A Robust and Efficient MTJ-based Spintronic IMP Gate for New Logic Circuits and Large-Scale Integration

A novel circuit topology of a spintronic stateful implication (IMP) logic gate based on a spin transfer torqueoperated magnetic tunnel junction (STT-MTJ) is proposed and analyzed. It is demonstrated that the proposed topology reduces the IMP error and also the energy consumption by about 60% as compared to the conventional one. Stateful IMP-based logic uses the nonvolatile memory unit (MTJ device) as the main computing element (logic gate) unlike the previously proposed MTJ-based logic-in-memory circuits, where MTJs are only ancillary devices in logical computations. Since the MTJ devices are CMOS compatible, the generalization of the spintronic IMP gate to a large-scale nonvolatile logic-in-memory system is compulsory. As an example we consider an IMP-based implementation of a full adder. In contrast to an earlier proposed IMP-based full adder with 37 operations, our design involves only 27 subsequent FALSE and IMP operations. Keywordsimplication (IMP) logic; nonvolatile logic-inmemory; magnetic tunnel junction (MTJ); spin transfer torque (STT)